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  1. [verwijderd] 17 januari 2011 17:05
    Chip2foil

    Ultra thin chip integration process for low cost
    communicative polymer foils
    VISION & AIM
    Chip2Foil aims at realising a technology
    platform for low cost placement and
    interconnection of ultra thin chips on
    polymer foils, within a high volume, reelto-
    reel production concept. This
    competence allows realising a broad
    variety of disposable communicative
    packages. These packages provide
    increased interaction between the packed
    product, the package and the user through
    near-field communication systems,
    allowing improved intelligent control of
    the logistic process of high volume
    applications like medicine and food. The
    chosen demonstrator is a Smart Blister
    package, which monitors the medicine
    taking behaviour of patients to ensure
    therapy compliance. Therapy noncompliance
    is a severe ethical and
    economic problem, leading to considerable
    numbers of casualties per year and high
    health care cost.
    A breakthrough is needed to raise the
    throughput of ultra thin chip placement
    and interconnection while reducing the
    cost. Target values are: chip thickness 10-
    20µm, 10-50 chips/second, package
    thickness 30-50µm, and assembly cost
    reduction 50%.
    The proposed Chip2Foil technical
    concept combines two main elements: (1)
    self-assembly for high speed chip
    placement with moderate accuracy, and
    (2) an adaptive circuitry approach, which
    compensates the initial placement errors
    and creates electrical interconnects after
    the chips have been placed.
    The objectives of Chip2Foil are to
    develop the main technology building
    blocks for the self-assembly and the
    adaptive circuitry approach, to determine
    and evaluate a preferred integration of
    these techniques, and to demonstrate and
    evaluate a complete process flow by
    realising a communicative foil package for
    the Smart Blister application.
    The consortium of 7 partners (4 industrial
    of which 1 global end-user, 2 research
    centres, 1 university) are leading partners
    in the field of flexible electronics and chip
    integration.
    Chip2foil PROJECT NUMBER: 248160
    CONTACT:
    WEB SITE:
    TIMELINE: 01/01/2010-31/12/2012
    BUDGET AND FUNDING SCHEME:
    CP
    Overall Cost: 4,668,697 €
    EC Funding: 2,980,000€
    PROJECT PARTNERS:
    1. TECHNISCHE UNIVERSITEIT DELFT,
    Netherlands.
    2. NEDERLANDSE ORGANISATIE VOOR
    TOEGEPAST
    NATUURWETENSCHAPPELIJK
    ONDERZOEK – TNO, Netherlands..
    3. ORBOTECH LTD ORBOTECH Israe.
    4. lINTERUNIVERSITAIR MICROELECTRONICA
    CENTRUM VZW, Belgium.
    5. PLASTIC ELECTRONIC GMBH, Austria.
    6. Koninklijke DSM N.V, Netherlands.
    7. DATACON TECHNOLOGY GMBH, Austria.
  2. [verwijderd] 24 maart 2011 23:56
    Supply Chain Collaboration for 3D Interconnect Applications

    3D Interconnect applications are attracting more and more interest from a large number of players in the semiconductor industry. I recently participated in two conferences (IWLPC – International Wafer Level Packaging Conference and IMAPS- International Microelectronics and Packaging Society Conference) on this topic to keep up-to-date on the new activities and developments in the industry and to share our latest advancements achieved with EMC3D consortium.

    EMC3D consortium is an international consortium of leading equipment (Applied Materials, EVG, Datacon, WSR), materials (AZ-EM, Dow Chemicals, Enthone, Brewer Science) and technology members (IZM Fraunhofer, LETI, KAIST, Samsung Institute of Technology, Texas A&M), founded in 2006 with the objective of developing robust and manufacturable processes for supporting chip stacking using through-silicon via (TSV) technology.

    blog.appliedmaterials.com/supply-chai...

    het 3D gebeuren qua nieuwe technology staat op doorbreken en ook hier is Datacon present,

    www.emc3d.org/

    mis namen zoals ASMI/ASML.....
  3. [verwijderd] 16 april 2011 12:30
    Wat betekent dit? Het aantal geplaatste aandelen is toegenomen met 390000 aandelen of 1,1% Heeft dit te maken met het uit te betalen stockdividend?
  4. [verwijderd] 17 april 2011 22:28
    At the end of 2010 the number of issued and outstanding
    ordinary shares was 34,128,517 of which Besi held 184,616
    shares in treasury. The issued share capital of Besi was increased
    this year by 400,000 shares related to Besi’s employee
    incentive compensation program. In 2009, Besi transferred
    2,800,000 shares from treasury for the acquisition of .

    Misschien nu weer gebeurd?
  5. [verwijderd] 27 april 2013 13:16
    quote:

    beeldscherm schreef op 24 maart 2011 23:56:

    Supply Chain Collaboration for 3D Interconnect Applications

    3D Interconnect applications are attracting more and more interest from a large number of players in the semiconductor industry. I recently participated in two conferences (IWLPC – International Wafer Level Packaging Conference and IMAPS- International Microelectronics and Packaging Society Conference) on this topic to keep up-to-date on the new activities and developments in the industry and to share our latest advancements achieved with EMC3D consortium.

    EMC3D consortium is an international consortium of leading equipment (Applied Materials, EVG, Datacon, WSR), materials (AZ-EM, Dow Chemicals, Enthone, Brewer Science) and technology members (IZM Fraunhofer, LETI, KAIST, Samsung Institute of Technology, Texas A&M), founded in 2006 with the objective of developing robust and manufacturable processes for supporting chip stacking using through-silicon via (TSV) technology.

    blog.appliedmaterials.com/supply-chai...

    het 3D gebeuren qua nieuwe technology staat op doorbreken en ook hier is Datacon present,

    www.emc3d.org/

    mis namen zoals ASMI/ASML.....
    Focus on Cost of Ownership— at the European 3D TSV Summit
    February 5, 2013
    .
    .......
    Finally, we come to the chip stacking processes themselves. Lindner and Hannes Kostner, of Besi, both talked about the ongoing collaboration with EVG and Besi on their advanced chip to wafer process, which involves an integrated system for die placement followed by a permanent collective bond.

    With a solid background in HVM flip chip bonders, Besi is leveraging that core competency to develop a thermocompression die bonder that meets the requirements for stacking TSV die such as thin die handling, accuracy, coplanarity and bond control. Kostner reported that the first tool buyoff was successful with a first time dual head/single pass assembly of multilayer TSV stacks at 50µ die thickness. The second evaluation is currently underway, and 27 companies have decided to use TCB technology “sooner or later.”

    I found the mere presence of Besi at the TSV Summit to be significant, because it signifies that we are on the path to HVM. “We had to see a HVM application before committing development costs in to high volume tool,” explained Kostner. “Wide I/O DRAM is that application.”

    So there you have it. Progress is clearly being made and I expect future charts at subsequent events to show lower CoO is happening. Stay tuned for more on the European 3D TSV Summit.

  6. [verwijderd] 10 januari 2014 12:31
    quote:

    beeldscherm schreef op 27 april 2013 13:16:

    [...]

    Focus on Cost of Ownership— at the European 3D TSV Summit
    February 5, 2013
    .
    .......
    Finally, we come to the chip stacking processes themselves. Lindner and Hannes Kostner, of Besi, both talked about the ongoing collaboration with EVG and Besi on their advanced chip to wafer process, which involves an integrated system for die placement followed by a permanent collective bond.

    With a solid background in HVM flip chip bonders, Besi is leveraging that core competency to develop a thermocompression die bonder that meets the requirements for stacking TSV die such as thin die handling, accuracy, coplanarity and bond control. Kostner reported that the first tool buyoff was successful with a first time dual head/single pass assembly of multilayer TSV stacks at 50µ die thickness. The second evaluation is currently underway, and 27 companies have decided to use TCB technology “sooner or later.”

    I found the mere presence of Besi at the TSV Summit to be significant, because it signifies that we are on the path to HVM. “We had to see a HVM application before committing development costs in to high volume tool,” explained Kostner. “Wide I/O DRAM is that application.”

    So there you have it. Progress is clearly being made and I expect future charts at subsequent events to show lower CoO is happening. Stay tuned for more on the European 3D TSV Summit.

    over 10 dgn,

    EUROPEAN 3D TSV SUMMIT (Jan 20-22, 2014 - Grenoble)

    www.semi.org/eu/node/8566
    raar er staat nog niks op de site v Besi

    krijgen we nog meer info van de "27 companies have decided to use TCB technology “sooner or later.”

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